SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 641

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

31.4
31.4.1
31.4.2
31.4.3
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Product Dependencies
Pin Multiplexing
Power Management
Interrupt Generation
Each pin is configurable, according to product definition as either a general-purpose I/O line
only, or as an I/O line multiplexed with one or two peripheral I/Os. As the multiplexing is hard-
ware defined and thus product-dependent, the hardware designer and programmer must
carefully determine the configuration of the PIO controllers required by their application. When
an I/O line is general-purpose only, i.e. not multiplexed with any peripheral I/O, programming of
the PIO Controller regarding the assignment to a peripheral has no effect and only the PIO Con-
troller can control how the pin is driven by the product.
The Power Management Controller controls the PIO Controller clock in order to save power.
Writing any of the registers of the user interface does not require the PIO Controller clock to be
enabled. This means that the configuration of the I/O lines does not require the PIO Controller
clock to be enabled.
However, when the clock is disabled, not all of the features of the PIO Controller are available,
including glitch filtering. Note that the Input Change Interrupt, Interrupt Modes on a programma-
ble event and the read of the pin level require the clock to be validated.
After a hardware reset, the PIO clock is disabled by default.
The user must configure the Power Management Controller before any access to the input line
information.
The PIO COntroller is connected on one of the sources of the Nested Vectored Interrupt Control-
ler (NVIC). Using the PIO Controller requires the NVIC to be programmed first.
The PIO Controller interrupt can be generated only if the PIO Controller clock is enabled.
SAM3X/A
SAM3X/A
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