SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 620

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

30.9.6
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• DATLEN: Data Length
0 = Forbidden value (1-bit data length not supported).
Any other value: The bit stream contains DATLEN + 1 data bits. .
• DATDEF: Data Default Value
This bit defines the level driven on the TD pin while out of transmission. Note that if the pin is defined as multi-drive by the
PIO Controller, the pin is enabled only if the SCC TD output is 1.
• MSBF: Most Significant Bit First
0 = The lowest significant bit of the data register is shifted out first in the bit stream.
1 = The most significant bit of the data register is shifted out first in the bit stream.
• DATNB: Data Number per frame
This field defines the number of data words to be transferred after each transfer start, which is equal to (DATNB +1).
• FSLEN: Transmit Frame Sync Length
This field defines the length of the Transmit Frame Sync signal and the number of bits shifted out from the Transmit Sync
Data Register if FSDEN is 1.
This field is used with FSLEN_EXT to determine the pulse length of the Transmit Frame Sync signal.
Pulse length is equal to FSLEN + (FSLEN_EXT * 16) + 1 Transmit Clock period.
620
620
FSLEN_EXT
FSDEN
MSBF
31
23
15
–
7
SAM3X/A
SAM3X/A
SSC Transmit Frame Mode Register
SSC_TFMR
0x4000401C
Read-write
FSLEN_EXT
30
22
14
–
6
–
FSLEN_EXT
DATDEF
FSOS
29
21
13
–
5
FSLEN_EXT
28
20
12
–
4
“SSC Write Protect Mode Register”
27
19
11
–
3
DATLEN
26
18
10
–
2
FSLEN
DATNB
.
25
17
–
9
1
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
FSEDGE
24
16
8
0