SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 510

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

26.18.21 SMC Mode Register
Name:
Address:
Access:
Reset:
• READ_MODE
1: The Read operation is controlled by the NRD signal.
0: The Read operation is controlled by the NCS signal.
• WRITE_MODE
1: The Write operation is controlled by the NWE signal.
0: The Write operation is controller by the NCS signal.
• EXNW_MODE: NWAIT Mode
The NWAIT signal is used to extend the current read or write signal. It is only taken into account during the pulse phase
Read and Write controlling signal. When the use of NWAIT is enabled, at least one cycle hold duration must be pro-
grammed for the read and write controlling signal
510
510
• Disabled Mode: The NWAIT input signal is ignored on the corresponding Chip Select.
• Frozen Mode: If asserted, the NWAIT signal freezes the current read or write cycle. After deassertion, the read/write
• Ready Mode: The NWAIT signal indicates the availability of the external device at the end of the pulse of the controlling
cycle is resumed from the point where it was stopped.
read or write signal, to complete the access. If high, the access normally completes. If low, the access is extended until
NWAIT returns high.
31
23
15
–
–
–
7
–
Value
SAM3X/A
SAM3X/A
0
1
2
3
0x400E0080 [0], 0x400E0094 [1], 0x400E00A8 [2], 0x400E00BC [3], 0x400E00D0 [4], 0x400E00E4 [5],
0x400E00F8 [6], 0x400E010C [7]
SMC_MODEx [x=0..7]
Read-write
0x00000000
30
22
14
–
–
–
6
–
DISABLED
FROZEN
READY
Name
29
21
13
–
–
–
5
EXNW_MODE
Description
Disabled
Reserved
Frozen Mode
Ready Mode
TDF_MODE
DBW
28
20
12
–
4
27
19
11
–
–
3
–
26
18
10
–
–
2
–
TDF_CYCLES
WRITE_MODE READ_MODE
25
17
–
9
–
1
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
BAT
24
16
–
8
0