SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 724

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SAM3X8E

Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
Datasheets
724
724
SAM3X/A
SAM3X/A
Figure 33-17. TWI Write Operation with Multiple Data Bytes with or without Internal Address
TWI_THR = data to send
Yes
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
- Internal address size
Set the Master Mode register:
TWI_CR = MSEN + SVDIS
Internal address size = 0?
Write ==> bit MREAD = 0
TWI_THR = Data to send
Write STOP Command
Set the Control register:
- Device slave address
Load Transmit register
- Transfer direction bit
Read Status register
Read Status register
(Needed only once)
TWI_CR = STOP
- Master enable
TXCOMP = 1?
Yes
Data to send?
Yes
Set TWI clock
TXRDY = 1?
Yes
BEGIN
END
(if IADR used)
No
No
No
Set the internal address
TWI_IADR = address
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12

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