SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 871

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

36.6
36.6.1
36.6.2
36.6.3
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Functional Description
TC Description
32-bit Counter
Clock Selection
The three channels of the Timer Counter are independent and identical in operation except
when quadrature decoder is enabled. The registers for channel programming are listed in
36-5 on page
Each channel is organized around a 32-bit counter. The value of the counter is incremented at
each positive edge of the selected clock. When the counter has reached the value 0xFFFF and
passes to 0x0000, an overflow occurs and the COVFS bit in TC_SR (Status Register) is set.
The current value of the counter is accessible in real time by reading the Counter Value Regis-
ter, TC_CV. The counter can be reset by a trigger. In this case, the counter value passes to
0x0000 on the next valid edge of the selected clock.
At block level, input clock signals of each channel can either be connected to the external inputs
TCLK0, TCLK1 or TCLK2, or be connected to the internal I/O signals TIOA0, TIOA1 or TIOA2
for chaining by programming the TC_BMR (Block Mode). See
Selection”.
Each channel can independently select an internal or external clock source for its counter:
•
•
This selection is made by the TCCLKS bits in the TC Channel Mode Register.
The selected clock can be inverted with the CLKI bit in TC_CMR. This allows counting on the
opposite edges of the clock.
The burst function allows the clock to be validated when an external signal is high. The BURST
parameter in the Mode Register defines this signal (none, XC0, XC1, XC2). See
”Clock Selection”
Note:
Internal clock signals: TIMER_CLOCK1, TIMER_CLOCK2, TIMER_CLOCK3,
TIMER_CLOCK4, TIMER_CLOCK5
External clock signals: XC0, XC1 or XC2
In all cases, if an external clock is used, the duration of each of its levels must be longer than the
master clock period. The external clock frequency must be at least 2.5 times lower than the mas-
ter clock
891.
Figure 36-2 ”Clock Chaining
SAM3X/A
SAM3X/A
Figure 36-3
Table
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