SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 796

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

Figure 35-21. Receiver Status
35.7.3.8
796
796
Baud Rate
US_RHR
SAM3X/A
SAM3X/A
RXRDY
US_CR
OVRE
Clock
Write
Read
RXD
Parity
Start
Bit
D0
The USART supports five parity modes selected by programming the PAR field in the Mode
Register (US_MR). The PAR field also enables the Multidrop mode, see
page
If even parity is selected, the parity generator of the transmitter drives the parity bit to 0 if a num-
ber of 1s in the character data bit is even, and to 1 if the number of 1s is odd. Accordingly, the
receiver parity checker counts the number of received 1s and reports a parity error if the sam-
pled parity bit does not correspond. If odd parity is selected, the parity generator of the
transmitter drives the parity bit to 1 if a number of 1s in the character data bit is even, and to 0 if
the number of 1s is odd. Accordingly, the receiver parity checker counts the number of received
1s and reports a parity error if the sampled parity bit does not correspond. If the mark parity is
used, the parity generator of the transmitter drives the parity bit to 1 for all characters. The
receiver parity checker reports an error if the parity bit is sampled to 0. If the space parity is
used, the parity generator of the transmitter drives the parity bit to 0 for all characters. The
receiver parity checker reports an error if the parity bit is sampled to 1. If parity is disabled, the
transmitter does not generate any parity bit and the receiver does not report any parity error.
Table 35-9
depending on the configuration of the USART. Because there are two bits to 1, 1 bit is added
when a parity is odd, or 0 is added when a parity is even.
Table 35-9.
D1
Character
797. Even and odd parity bit generation and error detection are supported.
D2
A
A
A
A
A
D3
shows an example of the parity bit for the character 0x41 (character ASCII “A”)
D4
Parity Bit Examples
D5
D6
D7
Parity
Hexa
0x41
0x41
0x41
0x41
0x41
Bit
Stop
Bit
Start
Bit
D0
D1
0100 0001
0100 0001
0100 0001
0100 0001
0100 0001
D2
Binary
D3
D4
D5
D6
D7
Parity Bit
Parity
Bit
None
1
0
1
0
Stop
Bit
RSTSTA = 1
“Multidrop Mode” on
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Parity Mode
Space
None
Even
Mark
Odd