SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 201

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

11.23.4
• ADDR
Region base address field. The value of N depends on the region size. For more information see
• VALID
MPU Region Number valid bit:
Write:
0: RNR not changed, and the processor:
updates the base address for the region specified in the RNR
ignores the value of the REGION field
1: the processor:
updates the value of the RNR to the value of the REGION field
updates the base address for the region specified in the REGION field.
Always reads as zero.
• REGION
MPU region field:
For the behavior on writes, see the description of the VALID field.
On reads, returns the current region number, as specified by the RNR.
11.23.4.1
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
N-1
31
23
15
MPU Region Base Address Register
The ADDR field
Reserved
30
22
14
6
The RBAR defines the base address of the MPU region selected by the RNR, and can update
the value of the RNR. See the register summary in
Write RBAR with the VALID bit set to 1 to change the current region number and update the
RNR. The bit assignments are:
The ADDR field is bits[31:N] of the RBAR. The region size, as specified by the SIZE field in the
RASR, defines the value of N:
If the region size is configured to 4GB, in the RASR, there is no valid ADDR field. In this case,
the region occupies the complete memory map, and the base address is 0x00000000.
The base address is aligned to the size of the region. For example, a 64KB region must be
aligned on a multiple of 64KB, for example, at 0x00010000 or 0x00020000.
N = Log
29
21
13
5
2
(Region size in bytes),
VALID
28
20
12
4
ADDR
ADDR
ADDR
27
19
11
3
Table 11-35 on page 196
26
18
10
2
REGION
“The ADDR field”
25
17
9
1
for its attributes.
SAM3X/A
SAM3X/A
24
16
N
0
.
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