SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 399

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SAM3X8E

Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
Datasheets
24.8.1.2
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Software Configuration
The SDRAM initialization sequence is described in the “SDRAM Device Initialization” section of
the SDRAM Controller.
Figure 24-3. 1 x 16-bit SDR-SDRAM Hardware Configuration
The following configuration must be respected:
The SDRAM initialization sequence is described in the “SDRAM Device Initialization” section of
the SDRAM Controller.
• Address lines A[2..11], A[13], BA0, BA1, SDA10, SDCS, SDWE, SDCKE, NBS1, RAS, CAS,
• Initialize the SDRAM Controller depending on the SDRAM device and system bus frequency.
• Address lines A[2..11], A[13-14], BA0, BA1, SDA10, SDCS, SDWE, SDCKE, NBS1, RAS,
• Initialize the SDRAM Controller depending on the SDRAM device and system bus frequency.
and data lines D[0..15] are multiplexed with PIO lines and thus dedicated PIOs must be
programmed in peripheral mode in the PIO controller.
CAS, and data lines D[0..15] are multiplexed with PIO lines and thus dedicated PIOs must be
programmed in peripheral mode in the PIO controller.
Controller
SDRAM
D0-D15
SDCKE
A[2-11]
SDA10
SDCS
SDCK
SDWE
NBS0
NBS1
BA0
BA1
RAS
CAS
A13
A14
CLK
CKE
WE
DQML
DQMH
RAS
CAS
D0-D15
CS
BA0
BA1
16M x 16
A0-A9
A10
A11
A12
A[2-11 ]
SDA10
A13
A14
SAM3X/A
SAM3X/A
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399

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