SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 583

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SAM3X8E

Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
Datasheets
28.2.15.26
Name:
Address:
Access:
• PID: Peripheral ID
Peripheral ID selection from PID2 to PID63
PID2 to PID63 refer to identifiers as defined in the section “Peripheral Identifiers” in the product datasheet.
Not all PID can be configured with divided clock.
Only the following PID can be configured with divided clock: CAN0, CAN1.
• CMD: Command
0 = Read mode.
1 = Write mode.
• DIV: Divisor Value
DIV must not be changed while peripheral is in use or when the peripheral clock is enabled.
To change the clock division factor (DIV) of a peripheral, its clock must first be disabled by writing either EN to 0 for the cor-
responding PID (DIV must be kept the same if this method is used), or writing to PMC_PCDR register. Then a second write
must be performed into PMC_PCR with the new value of DIV and a third write must be performed to enable the peripheral
clock (either by using PMC_PCR or PMC_PCER register).
• EN: Enable
0 = Selected Peripheral clock is disabled.
1 = Selected Peripheral clock is enabled.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
31
23
15
7
Value
PMC Peripheral Control Register
0
1
2
30
22
14
PMC_PCR
0x400E070C
Read-write
6
Name
PERIPH_DIV_MCK
PERIPH_DIV2_MCK
PERIPH_DIV4_MCK
29
21
13
5
CMD
EN
28
20
12
4
Description
Peripheral clock is MCK
Peripheral clock is MCK/2
Peripheral clock is MCK/4
27
19
11
3
PID
26
18
10
2
25
17
9
1
SAM3X/A
SAM3X/A
DIV
24
16
8
0
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