SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 84

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

11.7.2
11.7.3
84
84
SAM3X/A
SAM3X/A
Fault escalation and hard faults
Fault status registers and fault address registers
All faults exceptions except for hard fault have configurable exception priority, see
dler Priority Registers” on page
faults, see
Usually, the exception priority, together with the values of the exception mask registers, deter-
mines whether the processor enters the fault handler, and whether a fault handler can preempt
another fault handler. as described in
In some situations, a fault with configurable priority is treated as a hard fault. This is called prior-
ity escalation, and the fault is described as escalated to hard fault. Escalation to hard fault
occurs when:
If a bus fault occurs during a stack push when entering a bus fault handler, the bus fault does not
escalate to a hard fault. This means that if a corrupted stack causes a fault, the fault handler
executes even though the stack push for the handler failed. The fault handler operates but the
stack contents are corrupted.
Only Reset and NMI can preempt the fixed priority hard fault. A hard fault can preempt any
exception other than Reset, NMI, or another hard fault.
The fault status registers indicate the cause of a fault. For bus faults and memory management
faults, the fault address register indicates the address accessed by the operation that caused
the fault, as shown in
Table 11-12. Fault status and fault address registers
Handler
Hard fault
Memory
management fault
Bus fault
Usage fault
• A fault handler causes the same kind of fault as the one it is servicing. This escalation to hard
• A fault handler causes a fault with the same or lower priority as the fault it is servicing. This is
• An exception handler causes a fault for which the priority is the same as or lower than the
• A fault occurs and the handler for that fault is not enabled.
fault occurs because a fault handler cannot preempt itself because it must have the same
priority as the current priority level.
because the handler for the new fault cannot preempt the currently executing fault handler.
currently executing exception.
“System Handler Control and State Register” on page
Status register
name
HFSR
MMFSR
BFSR
UFSR
Table
11-12.
176. Software can disable execution of the handlers for these
“Exception model” on page
Address register
name
-
MMFAR
BFAR
-
Register description
“Hard Fault Status Register” on page
187
“Memory Management Fault Status
Register” on page 182
“Memory Management Fault Address
Register” on page 188
“Bus Fault Status Register” on page 183
“Bus Fault Address Register” on page
188
“Usage Fault Status Register” on page
185
179.
76.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
“System Han-