SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 902

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

36.7.10
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• TCCLKS: Clock Selection
• CLKI: Clock Invert
0: counter is incremented on rising edge of the clock.
1: counter is incremented on falling edge of the clock.
• BURST: Burst Signal Selection
• LDBSTOP: Counter Clock Stopped with RB Loading
0: counter clock is not stopped when RB loading occurs.
1: counter clock is stopped when RB loading occurs.
902
902
LDBDIS
Value
Value
WAVE
0
1
2
3
4
5
6
7
0
1
2
3
31
23
15
–
–
7
SAM3X/A
SAM3X/A
TC Channel Mode Register: Capture Mode
TC_CMRx [x=0..2] (WAVE = 0)
0x40080004 (0)[0], 0x40080044 (0)[1], 0x40080084 (0)[2], 0x40084004 (1)[0], 0x40084044 (1)[1],
0x40084084 (1)[2], 0x40088004 (2)[0], 0x40088044 (2)[1], 0x40088084 (2)[2]
Read-write
Name
TIMER_CLOCK1
TIMER_CLOCK2
TIMER_CLOCK3
TIMER_CLOCK4
TIMER_CLOCK5
XC0
XC1
XC2
Name
NONE
XC0
XC1
XC2
LDBSTOP
CPCTRG
30
22
14
–
–
6
Description
Clock selected: TCLK1
Clock selected: TCLK2
Clock selected: TCLK3
Clock selected: TCLK4
Clock selected: TCLK5
Clock selected: XC0
Clock selected: XC1
Clock selected: XC2
Description
The clock is not gated by an external signal.
XC0 is ANDed with the selected clock.
XC1 is ANDed with the selected clock.
XC2 is ANDed with the selected clock.
29
21
13
–
–
–
5
BURST
28
20
12
–
–
–
4
“TC Write Protect Mode Register” on page 901
CLKI
27
19
11
–
–
3
LDRB
ABETRG
26
18
10
–
2
TCCLKS
25
17
–
9
1
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
ETRGEDG
LDRA
24
16
–
8
0