SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 744
SAM3X8E
Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
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T
33.11.5
Name:
Address:
Access:
Reset:
TWI_CWGR is only used in Master mode.
• CLDIV: Clock Low Divider
The SCL low period is defined as follows:
• CHDIV: Clock High Divider
The SCL high period is defined as follows:
• CKDIV: Clock Divider
The CKDIV is used to increase both SCL high and low periods.
744
744
T
high
low
=
=
31
23
15
–
7
CLDIV
CHDIV
SAM3X/A
SAM3X/A
TWI Clock Waveform Generator Register
TWI_CWGR
0x4008C010 (0), 0x40090010 (1)
Read-write
0x00000000
2
2
CKDIV
CKDIV
30
22
14
–
6
+
+
4
4
T
T
MCK
MCK
29
21
13
–
5
28
20
12
–
4
CHDIV
CLDIV
27
19
11
–
3
26
18
10
–
2
CKDIV
25
17
–
9
1
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
24
16
–
8
0
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