SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 357

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Multi-buffer Transfer with Linked List for Source and Linked List for Destination (Row 4)
6. Once the transfer completes, the hardware sets the interrupts and disables the chan-
1. Read the Channel Handler Status register to choose a free (disabled) channel.
2. Set up the chain of Linked List Items (otherwise known as buffer descriptors) in mem-
3. Write the channel configuration information into the DMAC_CFGx register for
4. Make sure that the LLI.DMAC_CTRLBx register locations of all LLI entries in memory
5. Make sure that the LLI.DMAC_DSCRx register locations of all LLI entries in memory
6. Make sure that the LLI.DMAC_SADDRx/LLI.DMAC_DADDRx register locations of all
7. Make sure that the LLI.DMAC_CTRLAx.DONE field of the LLI.DMAC_CTRLAx register
8. Clear any pending interrupts on the channel from the previous DMAC transfer by read-
9. Program the DMAC_CTRLBx, DMAC_CFGx registers according to Row 4 as shown in
nel. At this time, you can either respond to the Buffer Transfer Completed Interrupt or
Chained Buffer Transfer Completed Interrupt, or poll for the Channel Handler Status
Register (DMAC_CHSR.ENAx) bit until it is cleared by hardware, to detect when the
transfer is complete.
ory. Write the control information in the LLI.DMAC_CTRLAx and LLI.DMAC_CTRLBx
registers location of the buffer descriptor for each LLI in memory (see
page
a. Set up the transfer type (memory or non-memory peripheral for source and desti-
b. Set up the transfer characteristics, such as:
– i. Transfer width for the source in the SRC_WIDTH field.
– ii. Transfer width for the destination in the DST_WIDTH field.
– v. Incrementing/decrementing or fixed address for source in SRC_INCR field.
– vi. Incrementing/decrementing or fixed address for destination DST_INCR field.
channel x.
a. Designate the handshaking interface type (hardware or software) for the source
b. If the hardware handshaking interface is activated for the source or destination
(except the last) are set as shown in Row 4 of
LLI.DMAC_CTRLBx register of the last Linked List Item must be set as described in
Row 1 of
list items.
(except the last) are non-zero and point to the base address of the next Linked List
Item.
LLI entries in memory point to the start source/destination buffer address preceding
that LLI fetch.
locations of all LLI entries in memory are cleared.
ing the status register: DMAC_EBCISR.
Table 23-4 on page
nation) and flow control device by programming the FC of the DMAC_CTRLBx
register.
and destination peripherals. This is not required for memory. This step requires pro-
gramming the SRC_H2SEL/DST_H2SEL bits, respectively. Writing a ‘1’ activates
the hardware handshaking interface to handle source/destination requests for the
specific channel. Writing a ‘0’ activates the software handshaking interface to han-
dle source/destination requests.
peripheral, assign the handshaking interface to the source and destination periph-
eral. This requires programming the SRC_PER and DST_PER bits, respectively.
359) for channel x. For example, in the register, you can program the following:
Table
23-4.
355.
Figure 23-4 on page 354
Table 23-4 on page
shows a Linked List example with two
355. The
Figure 23-5 on
SAM3X/A
SAM3X/A
357
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