SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 1157

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SAM3X8E

Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
Datasheets
• END_TR_EN: End of Transfer Enable Control
Used for OUT transfers only.
0: USB end of transfer is ignored.
1: UOTGHS device can put an end to the current buffer transfer.
When set, a BULK or INTERRUPT short packet or the last packet of an ISOCHRONOUS (micro) frame (DATAX) will close
the current buffer and the UOTGHS_DEVDMASTATUSx.END_TR_ST flag will be raised.
This is intended for UOTGHS non-prenegotiated end of transfer (BULK or INTERRUPT) or ISOCHRONOUS microframe
data buffer closure.
• END_B_EN: End of Buffer Enable Control
0: DMA Buffer End has no impact on USB packet transfer.
1: the endpoint can validate the packet (according to the values programmed in the UOTGHS_DEVEPTCFGx.AUTOSW
f i e l d , a n d i n t h e U OT G H S _ D E V E P T I E R x . S H O R T P A C K E T E S f i e l d ) a t D M A B u f f e r E n d , i . e . w h e n t h e
UOTGHS_DEVDMASTATUS.BUFF_COUNT reaches 0.
This is mainly for short packet IN validation initiated by the DMA reaching end of buffer, but could be used for OUT packet
truncation (discarding of unwanted packet data) at the end of DMA buffer.
• END_TR_IT: End of Transfer Interrupt Enable
0 : U OT G H S d e v i c e i n i t i a t e d b u f f e r t r a n s f e r c o m p l e t i o n w i l l n o t t r i g g e r a n y i n t e r r u p t a t
UOTGHS_DEVDMASTATUSx.END_TR_ST rising.
1: an interrupt is sent after the buffer transfer is complete, if the UOTGHS device has ended the buffer transfer.
Use when the receive size is unknown.
• END_BUFFIT: End of Buffer Interrupt Enable
0: UOTGHS_DEVDMA_STATUSx.END_BF_ST rising will not trigger any interrupt.
1: an interrupt is generated when the UOTGHS_HSTDMASTATUSx.BUFF_COUNT reaches zero.
• DESC_LD_IT: Descriptor Loaded Interrupt Enable
0: UOTGHS_DEVDMASTATUSx.DESC_LDST rising will not trigger any interrupt.
1: an interrupt is generated when a descriptor has been loaded from the bus.
• BURST_LCK: Burst Lock Enable
0: the DMA never locks bus access.
1: USB packets AHB data bursts are locked for maximum optimization of the bus bandwidth usage and maximization of fly-
by AHB burst duration.
• BUFF_LENGTH: Buffer Byte Length (Write-only)
This field determines the number of bytes to be transferred until end of buffer. The maximum channel transfer size
(32 KBytes) is reached when this field is 0 (default value). If the transfer size is unknown, this field should be set to 0, but
the transfer end may occur earlier under USB device control.
When this field is written, The UOTGHS_DEVDMASTATUSx.BUFF_COUNT field is updated with the write value.
Notes:
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
1. Bits [31:2] are only writable when issuing a channel Control Command other than “Stop Now”.
2. For reliability it is highly recommended to wait for both UOTGHS_DEVDMASTATUSx.CHAN_ACT and
UOTGHS_DEVDMASTATUSx.CHAN_ENB flags are at 0, thus ensuring the channel has been stopped before issuing a
command other than “Stop Now”.
SAM3X/A
SAM3X/A
1157
1157

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