SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 734

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

33.10.5.3
Figure 33-27. Master Performs a General Call
33.10.5.4
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GCACC
Clock Synchronization in Read Mode
SVACC
TXD
SAM3X/A
SAM3X/A
General Call
Clock Synchronization
S
GENERAL CALL
GENERAL CALL
0000000 + W
The general call is performed in order to change the address of the slave.
If a GENERAL CALL is detected, GACC is set.
After the detection of General Call, it is up to the programmer to decode the commands which
come afterwards.
In case of a WRITE command, the programmer has to decode the programming sequence and
program a new SADR if the programming sequence matches.
Figure 33-27 on page 734
Note:
In both read and write modes, it may happen that TWI_THR/TWI_RHR buffer is not filled /emp-
tied before the emission/reception of a new character. In this case, to avoid sending/receiving
undesired data, a clock stretching mechanism is implemented.
The clock is tied low if the shift register is empty and if a STOP or REPEATED START condition
was not detected. It is tied low until the shift register is loaded.
Figure 33-28 on page 735
This method allows the user to create an own programming sequence by choosing the program-
ming bytes and the number of them. The programming sequence has to be provided to the
master.
WRITE command = 00000100X
A
RESET command = 00000110X
Reset or write DADD
Reset after read
describes the General Call access.
describes the clock synchronization in Read mode.
A
DATA1
Programming sequence
New SADR
A
DATA2
A
New SADR
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
A
P