SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 1093

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

39.5.2.20
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
DMA interrupts
Test Modes
The exception device endpoint interrupts are:
The processing device DMA interrupts are:
There is no exception device DMA interrupt.
When written to one, the UOTGHS_DEVCTRL.TSTPCKT bit switches the USB device controller
in a “test packet” mode:
T h e t r a n s c e i v e r r e p e a t e d l y t r a n s m i t s t h e p a c k e t s t o r e d i n t h e c u r r e n t b a n k .
UOTGHS_DEVCTRL.TSTPCKT must be written to zero to exit the “test-packet” mode. The end-
point shall be reset by software after a “test-packet” mode.
This enables the testing of rise and falling times, eye patterns, jitter, and any other dynamic
waveform specifications.
The flow control used to send the packets is as follows:
To stop the test-packet mode, just write a zero to the UOTGHS_DEVCTRL.TSTPCKT bit.
• The Number of Busy Banks (UOTGHS_DEVEPTISRx.NBUSYBK) interrupt
• The Received OUT isochronous Multiple Data Interrupt (DTSEQ=MDATA &
• The Received OUT isochronous DataX Interrupt (DTSEQ=DATAX &
• The Underflow Interrupt (UOTGHS_DEVEPTISRx.UNDERFI)
• The NAKed OUT Interrupt (UOTGHS_DEVEPTISRx.NAKOUTI)
• The High-bandwidth isochronous IN error Interrupt (UOTGHS_DEVEPTISRx.HBISOINERRI)
• The NAKed IN Interrupt (UOTGHS_DEVEPTISRx.NAKINI)
• The High-bandwidth isochronous IN Flush error Interrupt
• The Overflow Interrupt (UOTGHS_DEVEPTISRx.OVERFI)
• The STALLed Interrupt (UOTGHS_DEVEPTISRx.STALLEDI)
• The CRC Error Interrupt (UOTGHS_DEVEPTISRx.CRCERRI)
• The Transaction error (UOTGHS_DEVEPTISRx.ERRORTRANS) interrupt
• The End of USB Transfer Status (UOTGHS_DEVDMASTATUSx.END_TR_ST) interrupt
• The End of Channel Buffer Status (UOTGHS_DEVDMASTATUSx.END_BF_ST) interrupt
• The Descriptor Loaded Status (UOTGHS_DEVDMASTATUSx.DESC_LDST) interrupt
• UOTGHS_DEVCTRL.TSTPCKT=1;
• Store data in an endpoint bank
• Write a zero to UOTGHS_DEVEPTIDRx.FIFOCON bit
UOTGHS_DEVEPTISRx.RXOUTI)
UOTGHS_DEVEPTISRx.RXOUTI)
(UOTGHS_DEVEPTISRx.HBISOFLUSHI)
SAM3X/A
SAM3X/A
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