SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 780

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SAM3X8E

Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
Datasheets
35.7
780
780
Functional Description
SAM3X/A
SAM3X/A
The USART is capable of managing several types of serial synchronous or asynchronous
communications.
It supports the following communication modes:
• 5- to 9-bit full-duplex asynchronous serial communication
• High-speed 5- to 9-bit full-duplex synchronous serial communication
• RS485 with driver control signal
• ISO7816, T0 or T1 protocols for interfacing with smart cards
• InfraRed IrDA Modulation and Demodulation
• SPI Mode
• LIN Mode (USART0 only)
– MSB- or LSB-first
– 1, 1.5 or 2 stop bits
– Parity even, odd, marked, space or none
– By 8 or by 16 over-sampling receiver frequency
– Optional hardware handshaking
– Optional break management
– Optional multidrop serial communication
– MSB- or LSB-first
– 1 or 2 stop bits
– Parity even, odd, marked, space or none
– By 8 or by 16 over-sampling frequency
– Optional hardware handshaking
– Optional break management
– Optional multidrop serial communication
– NACK handling, error counter with repetition and iteration limit, inverted data.
– Master or Slave
– Serial Clock Programmable Phase and Polarity
– SPI Serial Clock (SCK) Frequency up to Internal Clock Frequency MCK/6
– Compliant with LIN 1.3 and LIN 2.0 specifications
– Master or Slave
– Processing of frames with up to 256 data bytes
– Response Data length can be configurable or defined automatically by the Identifier
– Self synchronization in Slave node configuration
– Automatic processing and verification of the “Synch Break” and the “Synch Field”
– The “Synch Break” is detected even if it is partially superimposed with a data byte
– Automatic Identifier parity calculation/sending and verification
– Parity sending and verification can be disabled
– Automatic Checksum calculation/sending and verification
– Checksum sending and verification can be disabled
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12

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