SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 1220

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

Figure 40-8. Enabling Low-power Mode
40.7.5.2
1220
1220
(CAN_MSR3)
(CAN_MSR1)
(CAN_MR)
(CAN_SR)
(CAN_SR)
CAN BUS
WAKEUP
CAN_TIM
SLEEP
MRDY
MRDY
LPM
SAM3X/A
SAM3X/A
Disabling Low-power Mode
LPEN= 1
The CAN controller can be awake after detecting a CAN bus activity. Bus activity detection is
done by an external module that may be embedded in the chip. When it is notified of a CAN bus
activity, the software application disables Low-power Mode by programming the CAN controller.
To disable Low-power Mode, the software application must:
The CAN controller synchronizes itself with the bus activity by checking for eleven consecutive
“recessive” bits. Once synchronized, the WAKEUP signal in the CAN_SR register is set.
Depending on the corresponding mask in the CAN_IMR register, an interrupt is generated while
WAKEUP is set. The SLEEP signal in the CAN_SR register is automatically cleared once
WAKEUP is set. WAKEUP signal is automatically cleared once SLEEP is set.
If no message is being sent on the bus, then the CAN controller is able to send a message
eleven bit times after disabling Low-power Mode.
If there is bus activity when Low-power mode is disabled, the CAN controller is synchronized
with the bus activity in the next interframe. The previous message is lost (see
Mailbox 1
– Enable the CAN Controller clock. This is done by programming the Power
– Clear the LPM field in the CAN_MR register
Management Controller (PMC).
Arbitration lost
Mailbox 3
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
0x0
Figure
40-9).