SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 988

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

38.6.2
38.6.2.1
Figure 38-3. Functional View of the Channel Block Diagram
988
988
Peripheral Bus
Generator
from APB
Clock
from
z = 0 (x = 0, y = 1),
z = 1 (x = 2, y = 3),
z = 2 (x = 4, y = 5),
z = 3 (x = 6, y = 7)
SAM3X/A
SAM3X/A
PWM Channel
Block Diagram
Selector
Clock
2-bit gray
counter z
At reset, all clocks provided by the modulo n counter are turned off except clock ”MCK”. This sit-
uation is also true when the PWM master clock is turned off through the Power Management
Controller.
CAUTION:
Each of the 8 channels is composed of six blocks:
• Before using the PWM macrocell, the programmer must first enable the PWM clock in the
• A clock selector which selects one of the clocks provided by the clock generator (described in
• A counter clocked by the output of the clock selector. This counter is incremented or
• A comparator used to compute the OCx output waveform according to the counter value and
• A 2-bit configurable gray counter enables the stepper motor driver. One gray counter drives 2
Power Management Controller (PMC).
Section 38.6.1 on page
decremented according to the channel configuration and comparators matches. The size of
the counter is 16 bits.
the configuration. The counter value can be the one of the channel counter or the one of the
channel 0 counter according to SYNCx bit in the
page 1026
channels.
Duty-Cycle
Channel x
Channel 0
Counter
Update
Counter
Period
(PWM_SCM).
MUX
Comparator
Comparator
SYNCx
x
y
987).
OCx
OCy
Dead-Time
Dead-Time
Generator
Generator
Channel y (= x+1)
“PWM Sync Channels Mode Register” on
DTOHx
DTOLx
DTOHy
DTOLy
Channel x
Override
Override
Output
Output
OOOHx
OOOLx
OOOHy
OOOLy
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Protection
Protection
Fault
Fault
PWMLx
PWMHx
PWMLy
PWMHy