SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 467

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

26.16.2.4
Name: NFCDATA_Status
Access: Read
Reset: 0x00000000
• CMD1: Command Register Value for Cycle 1
When a Read or Write Access occurs, the Physical Memory Interface drives the IO bus with CMD1 field during the Com-
mand Latch cycle 1.
• CMD2: Command Register Value for Cycle 2
When VCMD2 field is set to true, the Physical Memory Interface drives the IO bus with CMD2 field during the Command
Latch cycle 2.
• VCMD2: Valid Cycle 2 Command
When set to true, the CMD2 field is issued after addressing cycle.
• ACYCLE: Number of Address required for the current command
When ACYCLE field is different from zero, ACYCLE Address cycles are performed after Command Cycle 1.
• CSID: Chip Select Identifier
Chip select used
• NFCEN: NFC Enable
When set to true, The NFC is enabled.
• NFCWR: NFC Write Enable
0: The NFC is in read mode.
1: The NFC is in write mode.
• NFCBUSY: NFC Busy Status Flag
If set to true, it indicates that the NFC is busy.
26.16.3
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
31
23
15
–
7
NFC Initialization
CSID
NFC DATA Status
30
22
14
–
6
Prior to any Command and Data Transfer, the SMC User Interface must be configured to meet
the device timing requirements.
29
21
13
–
5
CMD2
CMD1
ACYCLE
28
20
12
–
4
NFCBUSY
27
19
11
3
NFCWR
VCMD2
26
18
10
2
NFCEN
25
17
9
1
–
CMD2
CMD1
SAM3X/A
SAM3X/A
CSID
24
16
8
0
–
467
467