SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 452

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

Figure 26-19. TDF Optimization: No TDF wait states are inserted if the TDF period is over when the next access begins
26.13.3
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452
D[15:0]
A [23:2]
NCS0
NWE
MCK
NRD
SAM3X/A
SAM3X/A
TDF Optimization Disabled (TDF_MODE = 0)
read access on NCS0 (NRD controlled)
When optimization is disabled, tdf wait states are inserted at the end of the read transfer, so that
the data float period ends when the second access begins. If the hold period of the read1 con-
trolling signal overlaps the data float period, no additional tdf wait states will be inserted.
Figure
with no TDF optimization.
• read access followed by a read access on another chip select,
• read access followed by a write access on another chip select,
• read access followed by a write access on the same chip select,
26-20,
Figure 26-21
NRD_HOLD= 4
TDF_CYCLES = 6
and
Figure 26-22
Read to Write
Wait State
NWE_SETUP= 3
illustrate the cases:
write access on NCS0 (NWE controlled)
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12