SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 932

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

37.8.4
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SAM3X/A
SAM3X/A
Write Operation
In write operation, the HSMCI Mode Register (HSMCI_MR) is used to define the padding value
when writing non-multiple block size. If the bit PADV is 0, then 0x00 value is used when padding
data, otherwise 0xFF is used.
If set, the bit DMAEN in the HSMCI_DMA register enables DMA transfer.
The following flowchart
DMA facilities. Polling or interrupt method can be used to wait for the end of write according to
the contents of the Interrupt Mask Register (HSMCI_IMR).
(Figure
37-10) shows how to write a single block with or without use of
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12