SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 795

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

Figure 35-19. FSK Modulator Output
35.7.3.6
35.7.3.7
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Uptstream Frequencies
unipolar output
FSK Modulator
default polarity
[F0, F0+offset]
NRZ stream
Manchester
Synchronous Receiver
Receiver Operations
encoded
Output
data
Txd
1
In synchronous mode (SYNC = 1), the receiver samples the RXD signal on each rising edge of
the Baud Rate Clock. If a low level is detected, it is considered as a start. All data bits, the parity
bit and the stop bits are sampled and the receiver waits for the next start bit. Synchronous mode
operations provide a high speed transfer capability.
Configuration fields and bits are the same as in asynchronous mode.
Figure 35-20
Figure 35-20. Synchronous Mode Character Reception
When a character reception is completed, it is transferred to the Receive Holding Register
(US_RHR) and the RXRDY bit in the Status Register (US_CSR) rises. If a character is com-
pleted while the RXRDY is set, the OVRE (Overrun Error) bit is set. The last character is
transferred into US_RHR and overwrites the previous one. The OVRE bit is cleared by writing
the Control Register (US_CR) with the RSTSTA (Reset Status) bit to 1.
Example: 8-bit, Parity Enabled 1 Stop
Baud Rate
Sampling
Clock
RXD
illustrates a character reception in synchronous mode.
Start
0
D0
D1
D2
0
D3
D4
D5
D6
D7
1
Parity Bit
SAM3X/A
SAM3X/A
Stop Bit
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