SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 96

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

11.11.7
11.11.7.1
96
96
SAM3X/A
SAM3X/A
Conditional execution
The condition flags
assembler calculates the required offset from the label and the address of the current instruc-
tion. If the offset is too big, the assembler produces an error.
Most data processing instructions can optionally update the condition flags in the Application
Program Status Register (APSR) according to the result of the operation, see
gram Status Register” on page
subset. If a flag is not updated, the original value is preserved. See the instruction descriptions
for the flags they affect.
You can execute an instruction conditionally, based on the condition flags set in another instruc-
tion, either:
Conditional execution is available by using conditional branches or by adding condition code
suffixes to instructions. See
to make them conditional instructions. The condition code suffix enables the processor to test a
condition based on the flags. If the condition test of a conditional instruction fails, the instruction:
Conditional instructions, except for conditional branches, must be inside an If-Then instruction
block. See
Depending on the vendor, the assembler might automatically insert an IT instruction if you have
conditional instructions outside the IT block.
Use the CBZ and CBNZ instructions to compare the value of a register against zero and branch
on the result.
This section describes:
The APSR contains the following condition flags:
N
Z
C
• For B, BL, CBNZ, and CBZ instructions, the value of the PC is the address of the current
• For all other instructions that use labels, the value of the PC is the address of the current
• Your assembler might permit other syntaxes for PC-relative expressions, such as a label plus
• immediately after the instruction that updated the flags
• after any number of intervening instructions that have not updated the flags.
• does not execute
• does not write any value to its destination register
• does not affect any of the flags
• does not generate any exception.
•
•
instruction plus 4 bytes.
instruction plus 4 bytes, with bit[1] of the result cleared to 0 to make it word-aligned.
or minus a number, or an expression of the form [PC, #number].
“The condition flags”
“Condition code suffixes”
“IT” on page 138
Set to 1 when the result of the operation was negative, cleared to 0 otherwise.
Set to 1 when the result of the operation was zero, cleared to 0 otherwise.
Set to 1 when the operation resulted in a carry, cleared to 0 otherwise.
Table 11-16 on page 97
.
for more information and restrictions when using the IT instruction.
60. Some instructions update all flags, and some only update a
for a list of the suffixes to add to instructions
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
“Application Pro-