SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 352

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

23.4.2
23.4.3
352
352
SAM3X/A
SAM3X/A
Memory Peripherals
Handshaking Interface
DMAC transfer: Software controls the number of buffers in a DMAC transfer. Once the DMAC
transfer has completed, then hardware within the DMAC disables the channel and can generate
an interrupt to signal the completion of the DMAC transfer. You can then re-program the channel
for a new DMAC transfer.
Single-buffer DMAC transfer: Consists of a single buffer.
Multi-buffer DMAC transfer: A DMAC transfer may consist of multiple DMAC buffers. Multi-buf-
fer DMAC transfers are supported through buffer chaining (linked list pointers), auto-reloading of
channel registers, and contiguous buffers. The source and destination can independently select
which method to use.
Channel locking: Software can program a channel to keep the AHB master interface by locking
the arbitration for the master bus interface for the duration of a DMAC transfer, buffer, or chunk.
Bus locking: Software can program a channel to maintain control of the AMBA bus by asserting
hmastlock for the duration of a DMAC transfer, buffer, or transaction (single or chunk). Channel
locking is asserted for the duration of bus locking at a minimum.
Figure 23-3 on page 351
eral. There is no handshaking interface with the DMAC, and therefore the memory peripheral
can never be a flow controller. Once the channel is enabled, the transfer proceeds immediately
without waiting for a transaction request. The alternative to not having a transaction-level hand-
shaking interface is to allow the DMAC to attempt AMBA transfers to the peripheral once the
channel is enabled. If the peripheral slave cannot accept these AMBA transfers, it inserts wait
states onto the bus until it is ready; it is not recommended that more than 16 wait states be
inserted onto the bus. By using the handshaking interface, the peripheral can signal to the
DMAC that it is ready to transmit/receive data, and then the DMAC can access the peripheral
without the peripheral inserting wait states onto the bus.
Handshaking interfaces are used at the transaction level to control the flow of single or chunk
transfers. The operation of the handshaking interface is different and depends on whether the
peripheral or the DMAC is the flow controller.
The peripheral uses the handshaking interface to indicate to the DMAC that it is ready to trans-
fer/accept data over the AMBA bus. A non-memory peripheral can request a DMAC transfer
through the DMAC using one of two handshaking interfaces:
Software selects between the hardware or software handshaking interface on a per-channel
basis. Software handshaking is accomplished through memory-mapped registers, while hard-
ware handshaking is accomplished using a dedicated handshaking interface.
• Hardware handshaking
• Software handshaking
– Linked lists (buffer chaining) – A descriptor pointer (DSCR) points to the location
– Contiguous buffers – Where the address of the next buffer is selected to be a
in system memory where the next linked list item (LLI) exists. The LLI is a set of
registers that describe the next buffer (buffer descriptor) and a descriptor pointer
register. The DMAC fetches the LLI at the beginning of every buffer when buffer
chaining is enabled.
continuation from the end of the previous buffer.
shows the DMAC transfer hierarchy of the DMAC for a memory periph-
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12