SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 92

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

11.11.3.1
11.11.3.2
11.11.3.3
92
92
SAM3X/A
SAM3X/A
Constant
Instruction substitution
Register with optional shift
You specify an Operand2 constant in the form:
where constant can be:
In the constants shown above, X and Y are hexadecimal digits.
In addition, in a small number of instructions, constant can take a wider range of values.
These are described in the individual instruction descriptions.
When an Operand2 constant is used with the instructions MOVS, MVNS, ANDS, ORRS, ORNS,
EORS, BICS, TEQ or TST, the carry flag is updated to bit[31] of the constant, if the constant is
greater than 255 and can be produced by shifting an 8-bit value. These instructions do not affect
the carry flag if Operand2 is any other constant.
Your assembler might be able to produce an equivalent instruction in cases where you specify a
constant that is not permitted. For example, an assembler might assemble the instruction CMP
Rd, #0xFFFFFFFE as the equivalent instruction CMN Rd, #0x2.
You specify an Operand2 register in the form:
where:
Rm
shift
If you omit the shift, or specify LSL #0, the instruction uses the value in Rm.
If you specify a shift, the shift is applied to the value in Rm, and the resulting 32-bit value is used
by the instruction. However, the contents in the register Rm remains unchanged. Specifying a
register with shift also updates the carry flag when used with certain instructions. For information
on the shift operations and how they affect the carry flag, see
• any constant that can be produced by shifting an 8-bit value left by any number of bits within
• any constant of the form 0x00XY00XY
• any constant of the form 0xXY00XY00
• any constant of the form 0xXYXYXYXY.
a 32-bit word
#constant
Rm {, shift}
ASR #n
LSL #n
LSR #n
ROR #n
RRX
-
is the register holding the data for the second operand.
is an optional shift to be applied to Rm. It can be one of:
arithmetic shift right n bits, 1 n 32.
logical shift left n bits, 1 n 31.
logical shift right n bits, 1 n 32.
rotate right n bits, 1 n 31.
rotate right one bit, with extend.
if omitted, no shift occurs, equivalent to LSL #0.
“Shift Operations”
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12