SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 798

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

Figure 35-23. Timeguard Operations
35.7.3.11
798
798
Baud Rate
TXEMPTY
US_THR
TXRDY
Clock
Write
TXD
SAM3X/A
SAM3X/A
Receiver Time-out
Start
Bit
D0
D1
US_THR. TXEMPTY remains low until the timeguard transmission is completed as the time-
guard is part of the current character being transmitted.
Table 35-10
in relation to the function of the Baud Rate.
Table 35-10. Maximum Timeguard Length Depending on Baud Rate
The Receiver Time-out provides support in handling variable-length frames. This feature detects
an idle condition on the RXD line. When a time-out is detected, the bit TIMEOUT in the Channel
Status Register (US_CSR) rises and can generate an interrupt, thus indicating to the driver an
end of frame.
The time-out delay period (during which the receiver waits for a new character) is programmed
in the TO field of the Receiver Time-out Register (US_RTOR). If the TO field is programmed to
0, the Receiver Time-out is disabled and no time-out is detected. The TIMEOUT bit in US_CSR
remains to 0. Otherwise, the receiver loads a 16-bit counter with the value programmed in TO.
This counter is decremented at each bit period and reloaded each time a new character is
received. If the counter reaches 0, the TIMEOUT bit in the Status Register rises. Then, the user
can either:
D2
D3
D4
D5
Baud Rate
115200
Bit/sec
indicates the maximum length of a timeguard period that the transmitter can handle
14400
19200
28800
33400
56000
57600
1 200
9 600
D6
D7
Parity
Bit
Stop
Bit
TG = 4
Start
Bit
D0
Bit time
69.4
52.1
34.7
29.9
17.9
17.4
833
104
8.7
μs
D1
D2
D3
D4
D5
D6
D7
Parity
Bit
Stop
Bit
Timeguard
212.50
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
26.56
17.71
13.28
8.85
7.63
4.55
4.43
2.21
ms
TG = 4