SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 209

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

11.24 Glossary
Abort
Aligned
Banked register
Base register
Breakpoint
Condition field
Conditional execution
Context
Coprocessor
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
This glossary describes some of the terms used in technical documents from ARM.
A mechanism that indicates to a processor that the value associated with a memory access is
invalid. An abort can be caused by the external or internal memory system as a result of
attempting to access invalid instruction or data memory.
A data item stored at an address that is divisible by the number of bytes that defines the data
size is said to be aligned. Aligned words and halfwords have addresses that are divisible by four
and two respectively. The terms word-aligned and halfword-aligned therefore stipulate
addresses that are divisible by four and two respectively.
A register that has multiple physical copies, where the state of the processor determines which
copy is used. The Stack Pointer, SP (R13) is a banked register.
In instruction descriptions, a register specified by a load or store instruction that is used to hold
the base value for the instruction’s address calculation. Depending on the instruction and its
addressing mode, an offset can be added to or subtracted from the base register value to form
the address that is sent to memory.
See also
A breakpoint is a mechanism provided by debuggers to identify an instruction at which program
execution is to be halted. Breakpoints are inserted by the programmer to enable inspection of
register contents, memory locations, variable values at fixed points in the program execution to
test that the program is operating correctly. Breakpoints are removed after the program is suc-
cessfully tested.
A four-bit field in an instruction that specifies a condition under which the instruction can
execute.
If the condition code flags indicate that the corresponding condition is true when the instruction
starts executing, it executes normally. Otherwise, the instruction does nothing.
The environment that each process operates in for a multitasking operating system. In ARM pro-
cessors, this is limited to mean the physical address range that it can access in memory and the
associated memory access permissions.
A processor that supplements the main processor. Cortex-M3 does not support any
coprocessors.
“Index register”
SAM3X/A
SAM3X/A
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