SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 108

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

11.12.7.2
11.12.7.3
11.12.7.4
11.12.7.5
11.12.8
11.12.8.1
108
108
PUSH
PUSH
POP
SAM3X/A
SAM3X/A
LDREX and STREX
Operation
Restrictions
Condition flags
Examples
Syntax
{R0,R4-R7}
{R2,LR}
{R0,R10,PC}
PUSH stores registers on the stack in order of decreasing the register numbers, with the highest
numbered register using the highest memory address and the lowest numbered register using
the lowest memory address.
POP loads registers from the stack in order of increasing register numbers, with the lowest num-
bered register using the lowest memory address and the highest numbered register using the
highest memory address.
See
In these instructions:
When PC is in reglist in a POP instruction:
These instructions do not change the flags.
Load and Store Register Exclusive.
where:
cond
Rd
Rt
Rn
offset
• reglist must not contain SP
• for the PUSH instruction, reglist must not contain PC
• for the POP instruction, reglist must not contain PC if it contains LR.
• bit[0] of the value loaded to the PC must be 1 for correct execution, and a branch occurs to
• if the instruction is conditional, it must be the last instruction in the IT block.
this halfword-aligned address
LDREX{cond} Rt, [Rn {, #offset}]
STREX{cond} Rd, Rt, [Rn {, #offset}]
LDREXB{cond} Rt, [Rn]
STREXB{cond} Rd, Rt, [Rn]
LDREXH{cond} Rt, [Rn]
STREXH{cond} Rd, Rt, [Rn]
“LDM and STM” on page 106
is an optional condition code, see
is the destination register for the returned status.
is the register to load or store.
is the register on which the memory address is based.
is an optional offset applied to the value in Rn.
If offset is omitted, the address is the value in Rn.
for more information.
“Conditional execution” on page
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
96.