AT32UC3L032-D3UR Atmel, AT32UC3L032-D3UR Datasheet - Page 157

• Manufacturer Part Number: AT32UC3L032-D3UR
• Description: MCU AVR32 32KB FLASH 48TLLGA
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3L032-D3UR

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TLLGA
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: SPI, TWI, USART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 7
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL
• Development Tools By Supplier: AT32UC3L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 9 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

12.6.4.3
12.6.4.4
12.6.5
12.6.6
32099F–11/2010
Divided PB Clocks
Reset Controller
Leaving Shutdown sleep mode
Special consideration regarding waking-up from Shutdown sleep mode using the WAKE_N pin
Exiting the Shutdown sleep mode can be done using the events described in
page
Table 12-4.
When a wake-up event occurs, the regulator is turned-on again and the device will wait for
VDDCORE power to be valid again before starting again.
The bit SLEEP is then set in the RCAUSE register. This allows software running on the device to
distinguish between the first power-up and a wake-up from Shutdown mode.
By default, WAKE_N pin can normally be used to wake-up the device from Shutdown mode only
after Shutdown mode has been entered. If the WAKE_N is pulled low before the Shutdown
mode is entered, the device will not wake-up from the Shutdown sleep mode.
To allow WAKE_N pin to wake-up the device even if the Shutdown sleep mode is still not
entered, the bit WAKENEN in the Asynchronous Wake Up Enable (AWEN) register must be writ-
ten to one. If this bit is one, CPU execution will continue after the sleep instruction if the
WAKE_N pin was driven low before the Shutdown sleep mode is entered. The RCAUSE register
content will not be changed.
The clock generator in the Power Manager provides divided PBx clocks for use by peripherals
that require a prescaled PBx clock. This is described in the documentation for the relevant
modules.
The divided clocks are directly maskable, and are stopped in sleep modes where the PBx clocks
are stopped.
The Reset Controller collects the various reset sources in the system and generates hard and
soft resets for the digital logic.
Source
PA11 (WAKE_N)
RESET_N
AST
157.
Events That Can Wake-Up The Device From Shutdown Mode
Pulling-down RESET_N pin will wake-up the device
The device is kept under reset until RESET_N is tied high
again
32KHz Crystal oscillator must be set-up to use alternate
pinout (XIN32_2 and XOUT32_2) See SCIF Chapter
AST must be configured to use the clock from the 32KHz
crystal oscillator
AST must be configured to allow alarm,periodic or
overflow wake-up
How
Pulling-down PA11 will wake-up the device
AT32UC3L016/32/64
Table 12-4 on
157