AT32UC3L032-D3UR Atmel, AT32UC3L032-D3UR Datasheet - Page 375

MCU AVR32 32KB FLASH 48TLLGA

AT32UC3L032-D3UR

Manufacturer Part Number
AT32UC3L032-D3UR
Description
MCU AVR32 32KB FLASH 48TLLGA
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet

Specifications of AT32UC3L032-D3UR

Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TLLGA
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 9 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Figure 19-16. Receiver Behavior when Operating with Hardware Handshaking
32099F–11/2010
RXBUFF
Write
RXD
RTS
CR
RXEN = 1
Figure 19-15. Connection with a Remote Device for Hardware Handshaking
Setting the USART to operate with hardware handshaking is performed by writing the MODE
field in the Mode Register (MR) to the value 0x2.
The USART behavior when hardware handshaking is enabled is the same as the behavior in
standard synchronous or asynchronous mode, except that the receiver drives the RTS pin as
described below and the level on the CTS pin modifies the behavior of the transmitter as
described below. Using this mode requires using the Peripheral DMA Controller channel for
reception. The transmitter can handle hardware handshaking in any case.
Figure 19-16
pin is driven high if the receiver is disabled and if the status RXBUFF (Receive Buffer Full) com-
ing from the Peripheral DMA Controller channel is high. Normally, the remote device does not
start transmitting while its CTS pin (driven by RTS) is high. As soon as the Receiver is enabled,
the RTS falls, indicating to the remote device that it can start transmitting. Defining a new buffer
to the Peripheral DMA Controller clears the status bit RXBUFF and, as a result, asserts the pin
RTS low.
Figure 19-17
pin disables the transmitter. If a character is being processing, the transmitter is disabled only
after the completion of the current character and transmission of the next character happens as
soon as the pin CTS falls.
Figure 19-17. Transmitter Behavior when Operating with Hardware Handshaking
shows how the transmitter operates if hardware handshaking is enabled. The CTS
shows how the receiver operates if hardware handshaking is enabled. The RTS
CTS
TXD
USART
TXD
RXD
CTS
RTS
AT32UC3L016/32/64
RXD
TXD
RTS
CTS
Remote
Device
RXDIS = 1
375

Related parts for AT32UC3L032-D3UR