AT32UC3L032-D3UR Atmel, AT32UC3L032-D3UR Datasheet - Page 712

• Manufacturer Part Number: AT32UC3L032-D3UR
• Description: MCU AVR32 32KB FLASH 48TLLGA
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3L032-D3UR

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TLLGA
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: SPI, TWI, USART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 7
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL
• Development Tools By Supplier: AT32UC3L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 9 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

30.6.1
30.6.2
30.6.3
30.6.4
30.6.5
32099F–11/2010
How to Initialize The Module
Basic Asynchronous Receiver Operation
Basic Asynchronous Transmitter Operation
Basic Asynchronous Receiver with Resynchronization
Overrun
To initialize the aWire UART user interface the user must first enable the clock by writing a one
to the Clock Enable bit in the Clock Request Register (CLKR.CLKEN) and wait for the Clock
Enable bit in the Status Register (SR.CENABLED) to be set. After doing this either receive,
transmit or receive with resync must be selected by writing the corresponding value into the
Mode field of the Control (CTRL.MODE) Register. Due to the RC120M being asynchronous with
the system clock values must be allowed to propagate in the system. During this time the aWire
master will set the Busy bit in the Status Register (SR.BUSY).
After the SR.BUSY bit is cleared the Baud Rate field in the Baud Rate Register (BRR.BR) can
be written with the wanted baudrate (
clock frequency):
After this operation the user must wait until the SR.BUSY is cleared. The interface is now ready
to be used.
The aWire UART user interface must be initialized according to the sequence above, but the
CTRL.MODE field must be written to one (Receive mode).
When a data byte arrives the aWire UART user interface will indicate this by setting the Data
Ready Interrupt bit in the Status Register (SR.DREADYINT). The user must read the Data in the
Receive Holding Register (RHR.RXDATA) and clear the Interrupt bit by writing a one to the Data
Ready Interrupt Clear bit in the Status Clear Register (SCR.DREADYINT). The interface is now
ready to receive another byte.
The aWire UART user interface must be initialized according to the sequence above, but the
CTRL.MODE field must be written to two (Transmit mode).
To transmit a data byte the user must write the data to the Transmit Holding Register
(THE.TXDATA). Before the next byte can be written the SR.BUSY must be cleared.
By writing three into CTRL.MODE the aWire UART user interface will assume that the first byte
it receives is a sync byte (0x55) and set BRR.BR according to this. All subsequent transfers will
assume this baudrate, unless BRR.BR is rewritten by the user.
To make the aWire UART user interface accept a new sync resynchronization the aWire UART
user interface must be disabled by writing zero to CTRL.MODE and then reenable the interface.
In Receive mode an overrun can occur if the user has not read the previous received data from
the RHR.RXDATA when the newest data should be placed there. Such a condition is flagged by
setting the Overrun bit in the Status Register (SR.OVERRUN). If SR.OVERRUN is set the new-
est data received is placed in RHR.RXDATA and the data that was there before is overwritten.
f
br
) according to the following formula (
f
br
=
8f
---------- -
BR
aw
AT32UC3L016/32/64
f
aw
is the RC120M
712