AT32UC3L032-D3UR Atmel, AT32UC3L032-D3UR Datasheet - Page 637

• Manufacturer Part Number: AT32UC3L032-D3UR
• Description: MCU AVR32 32KB FLASH 48TLLGA
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3L032-D3UR

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TLLGA
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: SPI, TWI, USART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 7
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL
• Development Tools By Supplier: AT32UC3L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 9 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

27.5.3
27.5.4
27.5.5
27.5.6
27.6
27.6.1
32099F–11/2010
Functional Description
Clocks
Interrupts
Peripheral Events
Debug Operation
Analog Comparator Operation
The clock for the ACIFB bus interface (CLK_ACIFB) is generated by the Power Manager. This
clock is enabled at reset, and can be disabled in the Power Manager. It is recommended to dis-
able the ACIFB before disabling the clock, to avoid freezing the ACIFB in an undefined state.
The ACIFB uses a GCLK as clock source for the Analog Comparators. The user must set up this
GCLK at the right frequency. The CLK_ACIFB clock of the interface must be at least 4x the
GCLK frequency used in the comparators. The GCLK is used both for measuring the startup
time of a comparator, and to give a frequency for the comparisons done in Continuous Measure-
ment Mode, see
Refer to the Electrical Characteristics chapter for GCLK frequency limitations.
The ACIFB interrupt request line is connected to the interrupt controller. Using the ACIFB inter-
rupt requires the interrupt controller to be programmed first.
The ACIFB peripheral events are connected via the Peripheral Event System. Refer to the
Peripheral Event System chapter for details.
When an external debugger forces the CPU into debug mode, the ACIFB continues normal
operation. If the ACIFB is configured in a way that requires it to be periodically serviced by the
CPU through interrupts or similar, improper operation or data loss may result during debugging.
The ACIFB is enabled by writing a one to the Control Register Enable bit (CTRL.EN). Addition-
ally, the comparators must be individually enabled by programming the MODE field in the AC
Configuration Register (CONFn.MODE).
The results from the individual comparators can either be used directly (normal mode), or the
results from two comparators can be grouped to generate a comparison window (window mode).
All comparators need not be in the same mode, some comparators may be in normal mode,
while others are in window mode. There are restrictions on which AC channels that can be
grouped together in a window pair, see
Each AC channel can be in one of four different modes, determined by CONFn.MODE:
After being enabled, a startup time defined in CTRL.SUT is required before the result of the
comparison is ready. The GCLK is used for measuring the startup time of a comparator,
During the startup time the AC output is not available. When the ACn Ready bit in the Status
Register (SR.ACRDYn) is one, the output of ACn is ready. In window mode the result is avail-
able when both the comparator outputs are ready (SR.ACRDYn=1 and SR.ACRDYn+1=1).
• Off
• Continuous Measurement Mode (CM)
• User Triggered Single Measurement Mode (UT)
• Event Triggered Single Measurement Mode (ET)
Section
27.6.
Section
27.6.5.
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