AT32UC3L032-D3UR Atmel, AT32UC3L032-D3UR Datasheet - Page 682

MCU AVR32 32KB FLASH 48TLLGA

AT32UC3L032-D3UR

Manufacturer Part Number
AT32UC3L032-D3UR
Description
MCU AVR32 32KB FLASH 48TLLGA
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet

Specifications of AT32UC3L032-D3UR

Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TLLGA
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 9 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
28.7.12
Name:
Access Type:
Offset:
Reset Value:
• ACCTRL: Analog Comparator Control
• CONSEN: Consensus Filter Length
• CXDILEN: Cx Capacitor Discharge Length
• SYNCTIM: Sync Time Interval
32099F–11/2010
ACCTRL
31
23
15
7
When written to one, allows the CAT to disable the analog comparators when they are not needed. When written to zero, the
analog comparators are always enabled.
For QMatrix sensors, specifies that discharge will be terminated when CONSEN out of the most recent 5 comparator samples
are positive. For example, a value of 3 in the CONSEN field will terminate discharge when 3 out of the most recent 5 comparator
samples are positive. When CONSEN has the default value of 0, discharge will be terminated immediately when the comparator
output goes positive.
For QMatrix sensors, specifies how many burst prescaler clock cycles the CAT should use to discharge the Cx capacitor at the
end of each burst cycle.
When non-zero, determines the number of prescaled clock cycles between the start of the acquisition on each X line for QMatrix
acquisition.
Matrix Group Configuration Register 2
30
22
14
6
MGCFG2
Read/Write
0x38
0x00000000
-
CONSEN
29
21
13
5
28
20
12
4
SYNCTIM[7:0]
CXDILEN
27
19
11
3
26
18
10
2
SYNCTIM[11:8]
AT32UC3L016/32/64
-
25
17
9
1
24
16
8
0
682

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