AT32UC3L032-D3UR Atmel, AT32UC3L032-D3UR Datasheet - Page 841

MCU AVR32 32KB FLASH 48TLLGA

AT32UC3L032-D3UR

Manufacturer Part Number
AT32UC3L032-D3UR
Description
MCU AVR32 32KB FLASH 48TLLGA
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet

Specifications of AT32UC3L032-D3UR

Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TLLGA
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 9 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
35.4.17
35.4.18
32099F–11/2010
ADCIFB
ACIFB
1. Pendetect in sleep modes without CLK_ADCIFB will not wake the system
2. 8-bit mode is not working
3. ADC channels six to eight are non-functional
4. VERSION register reads 0x100
5. Using STARTUPTIME value larger than 0x1F will freeze ADC
6. ADCIFB DMA transfers does not work with divided PBA clock
1. Negative offset
2. Generic clock sources in sleep modes
3. VERSION register reads 0x200
The pendetect will not wake the system from a sleep mode if the clock for the
ADCIFB (CLK_ADCIFB) is turned off.
Fix/Workaround
Use a sleep mode where CLK_ADCIFB is not turned off to wake the part using
pendetect.
Do not use the 8-bit mode of the ADCIFB.
Fix/Workaround
Use the 10-bit mode and shift right by 2 bits.
ADC channels six to eight are non-functional.
Fix/Workaround
None.
The VERSION register reads 0x100 instead of 0x101.
Fix/Workaround
None.
Writing a value larger than 0x1F to the Startup Time field in the ADC Configuration Register
(ACR.STARTUP) will freeze the ADC, and the Busy Status bit in the Status Register
(SR.BUSY) will never be cleared.
Fix/Workaround
Do not write values larger than 0x1F to ACR.STARTUP.
DMA requests from the ADCIFB will not be performed when the PBA clock is slower than
the HSB clock.
Fix/Workaround
None
The static offset of the analog comparator is approximately -50mV.
Fix/Workaround
None.
The ACIFB should not use RC32K or CLK_1K as generic clock source if the chip uses sleep
modes.
Fix/Workaround
None.
The VERSION register reads 0x200 instead of 0x212.
Fix/Workaround
None.
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