AT32UC3L032-D3UR Atmel, AT32UC3L032-D3UR Datasheet - Page 621

• Manufacturer Part Number: AT32UC3L032-D3UR
• Description: MCU AVR32 32KB FLASH 48TLLGA
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3L032-D3UR

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TLLGA
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: SPI, TWI, USART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 7
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL
• Development Tools By Supplier: AT32UC3L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 9 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

26.9.6
Name:
Access Type:
Offset:
Reset Value:
• EN: Enable Status
• CELSE: Compare Else Status
• CGT: Compare Greater Than Status
• CLT: Compare Lesser Than Status
• BUSY: Busy Status
• READY: Ready Status
• NOCNT: No Contact Status
• PENCNT: Pen Contact Status
32099F–11/2010
31
23
15
7
-
-
-
-
0: The ADCIFB is disabled.
1: The ADCIFB is enabled.
This bit is cleared when CR.DIS is written to one.
This bit is set when CR.EN is written to one.
This bit is cleared when either CLT or CGT are detected or when analog compare is disabled.
This bit is set when no CLT or CGT are detected on the last converted data and analog compare is enabled.
This bit is cleared when no compare greater than CVR.HV is detected on the last converted data or when analog compare is
disabled.
This bit is set when compare greater than CVR.HV is detected on the last converted data and analog compare is enabled.
This bit is cleared when no compare lesser than CVR.LV is detected on the last converted data or when analog compare is
disabled.
This bit is set when compare lesser than CVR.LV is detected on the last converted data and analog compare is enabled.
This bit is cleared when the ADCIFB is ready to perform a conversion sequence.
This bit is set when the ADCIFB is busy performing a convention sequence.
This bit is cleared when the ADCIFB is busy performing a conversion sequence
This bit is set when the ADCIFB is ready to perform a conversion sequence.
This bit is cleared when no contact loss is detected or pen detect is disabled
This bit is set when contact loss is detected and pen detect is enabled.
This bit is cleared when no contact is detected or pen detect is disabled.
Status Register
CELSE
30
22
14
6
-
-
-
SR
Read-only
0x14
0x00000000
NOCNT
CGT
29
21
13
5
-
-
PENCNT
CLT
28
20
12
4
-
-
27
19
11
3
-
-
-
-
26
18
10
2
-
-
-
-
AT32UC3L016/32/64
OVRE
BUSY
25
17
9
1
-
-
READY
DRDY
EN
24
16
8
0
-
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