AT32UC3L032-D3UR Atmel, AT32UC3L032-D3UR Datasheet - Page 846

• Manufacturer Part Number: AT32UC3L032-D3UR
• Description: MCU AVR32 32KB FLASH 48TLLGA
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3L032-D3UR

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TLLGA
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: SPI, TWI, USART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 7
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL
• Development Tools By Supplier: AT32UC3L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 9 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

36. Datasheet Revision History
36.1
36.2
32099F–11/2010
Rev. F- 11/2010
Rev. E- 10/2010
Please note that the referring page numbers in this section are referred to this document. The
referring revision in this section are referring to the document revision.
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17.
Features: Removed superfluous R mark.
Package and Pinout, GPIO function multiplexing:TWIMS0-TWCK on PA20 removed. ADCIFB-
AD[3] on PA17 removed, number of ADC channels are 8, not 9. These were removed from rev.
C, but reappeared in rev. E.
Overview: Added missing signals in block diagram.
Package and pinout: Added note about TWI, SMBUS and 5V tolerant pads in peripheral
multiplexing. Added CAT DIS signal to signal descriptions. Removed TBD on ADVREFP
minimum voltage.
Memories: Added SAU slave address to physical memory map.
Supply and startup considerations: VDDIN is using GND as ground pin. Clarified references to
PORs in startup considerations.
FLASHCDW: Added serial number location to module configuration section.
PM: Added more info about the WAKE_N pin. Added info about CLK_PM, Updated the
selection main clock source section.
SCIF: Major chapter update.
AST: Updated digital tuner formula and conditions.
GPIO: Updated GPER reset value and added more registers with non-zero reset value.
CAT: Added info about VDIVEN and discharge current formula.
ADCIFB: Fixed Sample and Hold time formula.
GLOC: Added info about pullup control and renamed LUTCR register to CR.
TC: Added features and version register.
SAU: Added OPEN bit to config register. Added description of unlock fields.
TWIS: SCR is Write-only. Improved explanation of slave transmitter mode. Updated data
transfer diagrams.
Electrical Characteristics: Added more values. Added notes on simulated and characterized
values. Added pin capacitance, rise, and fall times. Added timing characteristics. Removed all
TBDs. Added ADC analog input characteristics. Symbol cleanup.
Errata: Updated errata list.
AT32UC3L016/32/64
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