AT32UC3L032-D3UR Atmel, AT32UC3L032-D3UR Datasheet - Page 39

MCU AVR32 32KB FLASH 48TLLGA

AT32UC3L032-D3UR

Manufacturer Part Number
AT32UC3L032-D3UR
Description
MCU AVR32 32KB FLASH 48TLLGA
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet

Specifications of AT32UC3L032-D3UR

Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TLLGA
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 9 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
6.1.3.3
32099F–11/2010
3.3V Supply Mode with 1.8V Regulated I/O Lines
In this mode, the internal regulator is connected to the 3.3V source and its output is connected
to both VDDCORE and VDDIO as shown in
use Shutdown mode.
Figure 6-4.
In this mode, some I/O lines are powered by VDDIN while other I/O lines are powered by VDDIO.
Refer to
Refer to the Power Manager chapter for a description of what parts of the system are powered in
Shutdown mode.
Important note: As the regulator has a maximum output current of 60mA, this mode can only be
used in applications where the maximum I/O current is known and compatible with the core and
peripheral power consumption. Typically, great care must be used to ensure that only a few I/O
lines are toggling at the same time and drive very small loads.
1.98-3.6V
Section 3.2 on page 9
VDDCORE
VDDANA
3.3V Supply Mode with 1.8V Regulated I/O Lines
+
-
for description of power supply for each I/O line.
VDDIN
GNDANA
I/O Pins
Linear
Figure
6-4. This configuration is required in order to
ADC
AT32UC3L016/32/64
VDDIO
Peripherals,
SCIF, BOD,
Memories,
OSC32K
RCSYS,
I/O Pins
RC32K
POR33
SM33
Wake
CPU,
DFLL
AST
GND
39

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