AT32UC3L032-D3UR Atmel, AT32UC3L032-D3UR Datasheet - Page 847

• Manufacturer Part Number: AT32UC3L032-D3UR
• Description: MCU AVR32 32KB FLASH 48TLLGA
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3L032-D3UR

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TLLGA
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: SPI, TWI, USART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 7
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL
• Development Tools By Supplier: AT32UC3L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 9 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

36.3
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32099F–11/2010
Rev. D - 06/2010
Rev. C - 06/2010
Rev. B - 05/2010
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Ordering Information: Ordering code for TQFP ES changed from AT32UC3L064-AUES to
AT32UC3L064-AUTES. TLLGA48 Tray option added.
Features and Description: Added QTouch library support.
USART: Description of unimplemented features removed.
Electrical Characteristics: Power Consumption numbers updated. Flash timing numbers
added.
Package and Pinout: Added pinout figure for TLLGA48 package.
Package and Pinout, GPIO function multiplexing:TWIMS0-TWCK on PA20 removed. ADCIFB-
AD[3] on PA17 removed, number of ADC channels are 8, not 9.
I/O Lines Considerations: Added: Following pins have high-drive capability: PA02, PA06,
PA08, PA09, and PB01.
Some TWI0 pins are SMBUS compliant (PA21, PB04, PB05).
HMATRIX Masters: PDCA is master 4, not master 3. SAU is master 3, not master 4.
SAU: IDLE bit added in the Status Register.
PDCA: Number of PDCA performance monitors is device dependent.
Peripheral Event System: Chapter updated.
PM: Bits in RCAUSE registers removed and renamed (JTAGHARD and AWIREHARD renamed
to JTAG and AWIRE respectively, JTAG and AWIRE removed. BOD33 bit removed).
PM: RCAUSE.BOD33 bit removed. SM33 reset will be detected as a POR reset.
PM: WDT can be used as wake-up source if WDT is clocked from 32KHz oscillator.
PM: Entering Shutdown mode description updated.
SCIF: DFLL output frequency is 40-150MHz, not 20-150MHz or 30-150MHz.
SCIF: Temperature sensor is connected to ADC channel 9, not 7.
SCIF: Updated the oscillator connection figure for OSC0
GPIO: Removed unimplemented features (pull-down, buskeeper, drive strength, slew rate,
Schmidt trigger, open drain).
SPI: RDR.PCS field removed (RDR[19:16]).
TWIS: Figures updated.
ADCIFB: The sample and hold time and the startup time formulas have been corrected (ADC
Configuration Register).
ADCIFB: Updated ADC signal names.
AT32UC3L016/32/64
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