r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 189

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
Figure 11.7
11.3.8
11.3.9
When the REIT instruction is executed at the end of an interrupt routine, the FLG register and PC, which have
been saved on the stack, are automatically restored. The program, that was running before the interrupt request
was acknowledged, starts running again.
Registers saved by a program in an interrupt routine should be saved using the POPM instruction or a similar
instruction before executing the REIT instruction.
If two or more interrupt requests are generated while a single instruction is being executed, the interrupt with
the higher priority is acknowledged.
Set bits ILVL2 to ILVL0 to select any priority level for maskable interrupts (peripheral function). However, if
two or more maskable interrupts have the same priority level, their interrupt priority is resolved by hardware,
with the higher priority interrupts acknowledged.
The priority of watchdog timer and other special interrupts is set by hardware.
Figure 11.7 shows the Hardware Interrupt Priority.
Software interrupts are not affected by the interrupt priority. If an instruction is executed, the MCU executes the
interrupt routine.
Returning from Interrupt Routine
Interrupt Priority
Hardware Interrupt Priority
Voltage monitor 1/comparator A1
Voltage monitor 2/comparator A2
Oscillation stop detection
Peripheral function
Watchdog timer
Address match
Address break
Single step
Reset
High
Low
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11. Interrupts