r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 453

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
Table 21.4
Count sources
Count operations
Count period
Count start condition
Count stop condition
Interrupt request generation
timing
TREO pin function
Read from timer
Write to timer
Selectable functions
Item
Output Compare Mode Specifications
f4, f8, f32, fC4
• Increment
• When the 8-bit counter content matches with the TREMIN register
• When RCS2 = 0 (4-bit counter is not used)
• When RCS2 = 1 (4-bit counter is used)
fi: Frequency of count source
n: Setting value of TREMIN register
1 (count starts) is written to the TSTART bit in the TRECR1 register
0 (count stops) is written to the TSTART bit in the TRECR1 register
When the 8-bit counter content matches with the TREMIN register content
Select any one of the following:
• Programmable I/O ports
• Output f2, fC, f4, or f8
• Compare output
When reading the TRESEC register, the 8-bit counter value can be read.
When reading the TREMIN register, the compare value can be read.
Writing to the TRESEC register is disabled.
When bits TSTART and TCSTF in the TRECR1 register are set to 0 (timer
stops), writing to the TREMIN register is enabled.
• Select use of 4-bit counter
• Compare output function
• TREO pin select function
content, the value returns to 00h and count continues.
The count value is held while count stops.
1/fi x 2 x (n+1)
1/fi x 32 x (n+1)
Every time the 8-bit counter value matches the TREMIN register value,
TREO output polarity is reversed. The TREO pin outputs “L” after reset
is deasserted and the timer RE is reset by the TRERST bit in the
TRECR1 register. Output level is held by setting the TSTART bit to 0
(count stops).
P0_4 or P6_0 is selected by the TREOSEL0 bit in the TIMSR register.
Specification
Page 421 of 740
21. Timer RE