r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 68

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
5.5
5.6
When the PM12 bit in the PM1 register is set to 1 (reset when watchdog timer underflows), the MCU resets its pins,
CPU, and SFR if the watchdog timer underflows. Then the program beginning with the address indicated by the
reset vector is executed. After reset, the low-speed on-chip oscillator clock with no division is automatically
selected as the CPU clock.
Refer to 4. Special Function Registers (SFRs) for the states of the SFRs after watchdog timer reset.
The internal RAM is not reset. When the watchdog timer underflows while writing to the internal RAM is in
progress, the contents of internal RAM are undefined.
The underflow period and refresh acknowledge period for the watchdog timer can be set by bits WDTUFS0 to
WDTUFS1 and bits WDTRCS0 to WDTRCS1 in the OFS2 register, respectively.
Refer to 14. Watchdog Timer for details of the watchdog timer.
When the PM03 bit in the PM0 register is set to 1 (MCU reset), the MCU resets its pins, CPU, and SFR. The
program beginning with the address indicated by the reset vector is executed. After reset, the low-speed on-chip
oscillator clock with no division is automatically selected for the CPU clock.
Refer to 4. Special Function Registers (SFRs) for the states of the SFRs after software reset.
The internal RAM is not reset.
Watchdog Timer Reset
Software Reset
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5. Resets