r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 498

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
Figure 23.4
23.3.1
23.3.2
If communication is aborted or a communication error occurs while transmitting or receiving in clock
synchronous serial I/O mode, follow the procedures below:
(1) Set the TE bit in the U2C1 register to 0 (transmission disabled) and the RE bit to 0 (reception disabled).
(2) Set bits SMD2 to SMD0 in the U2MR register to 000b (serial interface disabled).
(3) Set bits SMD2 to SMD0 in the U2MR register to 001b (clock synchronous serial I/O mode).
(4) Set the TE bit in the U2C1 register to 1 (transmission enabled) and the RE bit to 1 (reception enabled).
Use the CKPOL bit in the U2C0 register to select the transfer clock polarity. Figure 23.4 shows the Transfer
Clock Polarity.
(1) CKPOL bit in U2C0 register = 0 (transmit data output at the falling edge and
(2) CKPOL bit in U2C0 register = 1 (transmit data output at the rising edge and
CLK2
TXD2
RXD2
CLK2
TXD2
RXD2
The above applies when:
Measure for Dealing with Communication Errors
CLK Polarity Select Function
•
•
receive data input at the rising edge of the transfer clock)
receive data input at the falling edge of the transfer clock)
UFORM bit in U2C0 register = 0 (LSB first)
U2LCH bit in U2C1 register = 0 (not inverted)
Transfer Clock Polarity
D0
D0
D0
D0
D1
D1
D1
D1
D2
D2
D2
D2
D3
D3
D3
D3
D4
D4
D4
D4
D5
D5
D5
D5
D6
D6
D6
D6
D7
D7
D7
D7
“H” output from CLK2 pin
“L” output from CLK2 pin
during no transfer
during no transfer
23. Serial Interface (UART2)
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