r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 307
r5f21346mnfp
Manufacturer Part Number
r5f21346mnfp
Description
Single-chip Mcus Incorporates The R8c Cpu Core
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5F21346MNFP.pdf
(776 pages)
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R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
19.5.1
Notes:
Table 19.10
j = A, B, C, or D
BFC, BFD: Bits in TRCMR register
TRCGRA
TRCGRB
TRCGRC
TRCGRD
TRCGRC
TRCGRD
1. Set to these bits when the TSTART bit in the TRCMR register is set to 0 (count stops).
2. If the pin function is set for waveform output (refer to 7.5 Port Settings ), the initial output level is output when the
3. To select fOCO-F, set it to the clock frequency higher than the CPU clock frequency.
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Register
Address 0121h
TRCCR1 register is set.
Symbol
Symbol
Bit
CCLR
TCK0
TCK1
TCK2
TOA
TOB
TOC
TOD
Timer RC Control Register 1 (TRCCR1) for Output Compare Function
−
BFC = 0
BFD = 0
BFC = 1
BFD = 1
CCLR
Functions of TRCGRj Register when Using Output Compare Function
b7
0
Setting
TRCIOA output level select bit
TRCIOB output level select bit
TRCIOC output level select bit
TRCIOD output level select bit
Count source select bit
TRC counter clear select bit
TCK2
b6
0
General register. Write a compare value to one of these
registers.
General register. Write a compare value to one of these
registers.
Buffer register. Write the next compare value to one of
these registers. (Refer to 19.3.2 Buffer Operation .)
Bit Name
TCK1
b5
0
(1)
TCK0
b4
(1, 2)
(1, 2)
(1, 2)
(1, 2)
0
Register Function
0: Initial output “L”
1: Initial output “H”
b6 b5 b4
0: Disable clear (free-running operation)
1: Clear by compare match in the TRCGRA register
0 0 0: f1
0 0 1: f2
0 1 0: f4
0 1 1: f8
1 0 0: f32
1 0 1: TRCCLK input rising edge
1 1 0: fOCO40M
1 1 1: fOCO-F
TOD
b3
0
TOC
b2
(3)
0
Function
TOB
b1
0
TOA
b0
0
TRCIOA
TRCIOB
TRCIOC
TRCIOD
TRCIOA
TRCIOB
Output Compare
Output Pin
Page 275 of 740
19. Timer RC
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