r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 589

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
26.6
Figure 26.16
Figures 26.16 to 26.19 show Examples of Register Setting When Using I
Examples of Register Setting
Register Setting Example in Master Transmit Mode (I
ICCR1 register
ICCR2 register
ICSR register
ICSR register
ICCR2 register
ICCR1 register
ICSR register
Write transmit data to ICDRT register
Write transmit data to ICDRT register
Write transmit data to ICDRT register
Read ACKBR bit in ICIER register
Read BBSY bit in ICCR2 register
Read TEND bit in ICSR register
Read TDRE bit in ICSR register
Read TEND bit in ICSR register
Read STOP bit in ICSR register
No
No
No
No
No
No
ACKBR = 0?
Initial setting
Yes
BBSY = 0?
TEND = 1?
TDRE = 1?
TEND = 1?
Last byte?
STOP = 1?
Transmit
TDRE bit ← 0
mode?
TEND bit ← 0
TRS bit ← 1
MST bit ← 1
SCP bit ← 0
BBSY bit ← 1
SCP bit ← 0
BBSY bit ← 0
TRS bit ← 0
MST bit ← 0
STOP bit ← 0
Start
End
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
Master receive mode
• Set the STOP bit in the ICSR register to 0.
• Set the IICSEL bit in the SSUIICSR register to 1.
• Set the MSTIIC bit in the MSTCR register to 0.
(1) Determine the state of the SCL and SDA lines.
(2) Set to master transmit mode.
(3) Generate a start condition.
(4) Set the transmit data of the 1st byte
(5) Wait until 1 byte of data is transmitted.
(6) Determine the ACKBR bit from the specified
(7) Set the transmit data after 2nd byte
(8) Wait until the ICRDT register is empty.
(9) Set the transmit data of the last byte.
(10) Wait for end of transmission of the last byte.
(11) Set the TEND bit to 0.
(12) Set the STOP bit to 0.
(13) Generate a stop condition.
(14) Wait until a stop condition is generated.
(15) Set to slave receive mode.
(slave address + R/W).
slave device.
(except the last byte).
Set the TDRE bit to 0.
2
C bus interface.
2
C bus Interface Mode)
26. I
Page 557 of 740
2
C bus Interface