r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 683
r5f21346mnfp
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r5f21346mnfp
Description
Single-chip Mcus Incorporates The R8c Cpu Core
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5F21346MNFP.pdf
(776 pages)
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R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
32.4.11.4 Block Erase Command
When 20h is written in the first bus cycle and then D0h is written in the second bus cycle to any block address,
auto-erasure (erase and erase verify operation) starts in the specified block.
The FST7 bit in the FST register can be used to confirm whether auto-erasure has completed. The FST7 bit is
set to 0 during auto-erasure and is set to 1 when auto-erasure completes. After auto-erasure completes, all data
in the block is set to FFh.
After auto-erasure has completed, the auto-erase result can be confirmed by the FST5 bit in the FST register.
(Refer to 32.4.12 Full Status Check).
The block erase command targeting each block in the program ROM can be disabled using the lock bit.
The following commands are not accepted under the following conditions:
•
•
•
•
Figure 32.10 shows a Block Erase Flowchart in EW0 Mode (Flash Ready Status Interrupt Disabled), Figure
32.11 shows a Block Erase Flowchart in EW0 Mode (Flash Ready Status Interrupt Disabled and Suspend
Enabled), Figure 32.12 shows a Block Erase Flowchart in EW0 Mode (Flash Ready Status Interrupt Enabled
and Suspend Enabled), and Figure 32.13 shows a Block Erase Flowchart in EW1 Mode (Flash Ready Status
Interrupt Disabled and Suspend Enabled).
In EW1 mode, do not execute this command to any block where a rewrite control program is allocated.
While the RDYSTIE bit in the FMR0 register is set to 1 (flash ready status interrupt enabled), a flash ready
status interrupt can be generated upon completion of auto-erasure. While the RDYSTIE bit is set to 1 and the
FMR20 bit in the FMR2 register is set to 1 (erase-suspend enabled), a flash ready status interrupt is generated
when the FMR21 bit is set to 1 (erase-suspend request) and auto-erasure suspends. The auto-erase result can be
confirmed by reading the FST register during the interrupt routine.
Block erase commands targeting data flash block A when the FMR14 bit in the FMR1 register is set to 1
(rewrite disabled).
Block erase commands targeting data flash block B when the FMR15 bit is set to 1 (rewrite disabled).
Block erase commands targeting data flash block C when the FMR16 bit is set to 1 (rewrite disabled).
Block erase commands targeting data flash block D when the FMR17 bit is set to 1 (rewrite disabled).
32. Flash Memory
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