r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 502

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
Table 23.6
Notes:
U2TB
U2RB
U2BRG
U2MR
U2C0
U2C1
U2SMR
U2SMR2
U2SMR3
U2SMR4
URXDF
U2SMR5
1. The bits used for transmit/receive data are as follows:
2. The contents of the following are undefined:
Register
- Bits b7 and b8 when transfer data is 7 bits long
- Bit b8 when transfer data is 8 bits long
- Bits b0 to b6 when transfer data is 7 bits long
- Bits b0 to b7 when transfer data is 8 bits long
- Bits b0 to b8 when transfer data is 9 bits long
Registers Used and Settings in UART Mode
b0 to b8
b0 to b8
OER, FER, PER, SUM Error flag
b0 to b7
SMD2 to SMD0
CKDIR
STPS
PRY, PRYE
IOPOL
CLK0, CLK1
CRS
TXEPT
CRD
NCH
CKPOL
UFORM
TE
TI
RE
RI
U2IRS
U2RRM
U2LCH
U2ERE
b0 to b7
b0 to b7
b0 to b7
b0 to b7
DF2EN
MP
Bit
Set transmit data.
Receive data can be read.
Set a bit rate.
Set to 100b when transfer data is 7 bits long.
Set to 101b when transfer data is 8 bits long.
Set to 110b when transfer data is 9 bits long.
Select the internal clock or external clock.
Select the stop bit.
Select whether parity is included and whether odd or even.
Select the TXD/RXD I/O polarity.
Select the count source for the U2BRG register.
Select CTS or RTS to use functions.
Transmit register empty flag
Enable or disable the CTS or RTS function.
Select TXD2 pin output mode.
Set to 0.
Select LSB first or MSB first when transfer data is 8 bits long.
Set to 0 when transfer data is 7 or 9 bits long.
Set to 1 to enable transmission.
Transmit buffer empty flag
Set to 1 to enable reception.
Receive complete flag
Select the UART2 transmit interrupt source.
Set to 0.
Set to 1 to use inverted data logic.
Set to 0.
Set to 0.
Set to 0.
Set to 0.
Set to 0.
Select the digital filter disabled or enabled.
Set to 0.
(1)
(1, 2)
Function
23. Serial Interface (UART2)
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