r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 500

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
Figure 23.6
23.3.5
23.3.6
If the U2LCH bit in the U2C1 register is set to 1 (inverted), the data written to the U2TB register has its logic
inverted before being transmitted. Similarly, the received data has its logic inverted when read from the U2RB
register. Figure 23.6 shows the Serial Data Logic Switching.
The CTS function is used to start transmit and receive operation when “L” is applied to the CTS2/RTS2 pin.
Transmit and receive operation begins when the CTS2/RTS2 pin is held low. If the “L” signal is switched to
“H” during a transmit or receive operation, the operation stops before the next data.
For the RTS function, the CTS2/RTS2 pin outputs “L” when the MCU is ready for a receive operation. The
output level goes high at the first falling edge of the CLK2 pin.
• The CRD bit in the U2C0 register = 1 (CTS/RTS function disabled)
• The CRD bit = 0, CRS bit = 0 (CTS function selected)
• The CRD bit = 0, CRS bit = 1 (RTS function selected)
The CTS2/RTS2 pin operates as the programmable I/O function.
The CTS2/RTS2 pin operates as the CTS function.
The CTS2/RTS2 pin operates as the RTS function.
(1) U2LCH Bit in U2C1 Register = 0 (not inverted)
(2) U2LCH Bit in U2C1 Register = 1 (inverted)
The above applies when:
Serial Data Logic Switching Function
CTS/RTS Function
• CKPOL bit in U2C0 register = 0 (transmit data output at the falling edge of the transfer clock)
• UFORM bit in U2C0 register = 0 (LSB first)
Serial Data Logic Switching
Transfer Clock
Transfer Clock
(not inverted)
(inverted)
TXD2
TXD2
D0
D0
D1
D1
D2
D2
D3
D3
D4
D4
D5
D5
D6
D6
D7
D7
23. Serial Interface (UART2)
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