r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 590

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
Figure 26.17
Notes:
1. Do not generate interrupts while processing steps (1) to (3).
2. For 1 byte of data reception, skip steps (2) to (6) after step (1) and jump to process step (7).
3. After confirming the falling edge of the 9th clock cycle of SCL, generate a stop condition.
Process step (8) is a dummy read from the ICDRR register.
Refer to 26.9.1 Master Receive Mode.
ICSR register
ICCR1 register
ICSR register
ICIER register
ICIER register
ICCR1 register
ICSR register
ICCR2 register
ICCR1 register
ICCR1 register
Register Setting Example in Master Receive Mode (I
Read STOP bit in ICSR register
Read RDRF bit in ICSR register
Read RDRF bit in ICSR register
Dummy read in ICDRR register
No
No
No
No
Master receive mode
Read ICDRR register
Read ICDRR register
Read ICDRR register
Last receive - 1?
Yes
Yes
Yes
Yes
RDRF = 1?
RDRF = 1?
SCLO=0 ?
STOP = 1?
ACKBT bit ← 0
ACKBT bit ← 1
TEND bit ← 0
TDRE bit ← 0
RCVD bit ← 1
STOP bit ← 0
RCVD bit ← 0
End
TRS bit ← 0
BBSY bit ← 0
SCP bit ← 0
MST bit ← 0
No
Yes
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
(1) Set the TEND bit to 0 and set to master receive mode.
(2) Set the ACKBT bit to the transmit device.
(3) Dummy read the ICDRR register.
(4) Wait until 1 byte is received.
(5) Determine (last receive − 1).
(6) Read the receive data.
(7) Set the ACKBT bit of the last byte and set continuous
(8) Read the receive data of (last byte − 1).
(9) Wait until the last byte is received.
(10) Set the STOP bit to 0.
(11) Generate a stop condition.
(12) Wait until a stop condition is generated.
(13) Read the receive data of the last byte.
(14) Set the RCVD bit to 0.
(15) Set to slave receive mode.
receive operation to disable (RCVD = 1).
Set the TDRE bit to 0.
2
C bus Interface Mode)
(1,2)
(3)
(1)
(2)
26. I
(1)
Page 558 of 740
2
C bus Interface