SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 188

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
11.6.11.5
188
188
SAM4S
SAM4S
ISB
Instruction Synchronization Barrier.
Syntax
where:
cond
Operation
ISB acts as an instruction synchronization barrier. It flushes the pipeline of the processor, so that
all instructions following the ISB are fetched from memory again, after the ISB instruction has
been completed.
Condition Flags
This instruction does not change the flags.
Examples
ISB{cond}
ISB
is an optional condition code, see
; Instruction Synchronisation Barrier
“Conditional Execution”
.
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11

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